III
B.Tech I Semester Supplementary Examinations,June 2010
COMPUTER SYSTEM ORGANIZATION Electrical
And Electronics Engineering
Time: 3 hours
Max Marks: 80
Answer any FIVE Questions
All
Questions carry equal marks
1. (a) What are the different physical forms
available to establish an inter- connection network? Give the summary of those.
(b)
Explain time-shared common bus
Organization.
(c)
Explain system bus structure for multiprocessors. [16]
2. Explain the following:
(a)
Asynchronous DRAM
(b)
Synchronous DRAM.
[8+8]
3. (a) Explain the following i. Microoperation
ii. Microinstruction
iii. Microprogram
iv.
Control memory
(b)
Differentiate between Hardwired control and Microprogrammed control.[8+8]
4. Perform the subtraction with the following unsigned
numbers by taking 2’s Com- plement of subtrahend.
(a)
11010-10000 (b) 11010-1101
(c) 100-110000
(d)
1010100-1010100.
[16]
5. (a) When is the interrupt service routine for a device invoked? Upon the occur- rence of an interrupt, how
does the processor determine the memory address of the correct service
routine. What is the status
of interrupted program during and after interrupt.
(b)
Which is the most efficient in the following?
i. Programmed I/O
ii. Interrupt Initiated I/O
iii. DMA
Justify
your answer
[8+8]
6. (a) Why do we need so many addressing modes? Is
the instruction size influenced by the
number of addressing modes which a processor supports? State whether the number of addressing modes will be more in RISC or
CISC?
(b)
What are register transfer logic languages? Explain
few RTL statement for
branching with their actual functioning.
[8+8]
7. The content of AC in the basic
computer is hexadecimal A937 and the
initial value of E is 1. Determine the
contents of AC, E , PC, AR , and IR in
hexadecimal after the execution of
the CLA instruction. Repeat
11 more times, starting from each one of the register-reference instructions.
The initial value of PC
is hexadecimal
021. [16]
8.
(a) Discuss different
approaches to vector computation
(b)
What is Pipeline Processor?
What are advantages of it? [8+8]
III
B.Tech I Semester Supplementary Examinations,June 2010
COMPUTER SYSTEM ORGANIZATION Electrical
And Electronics Engineering
Time: 3 hours
Max Marks: 80
Answer any FIVE Questions
All
Questions carry equal marks
1.
(a) Explain address sequencing in
Microprogrammed control unit
(b)
Explain in detail various fields of microinstruction format with
diagram. [8+8]
2.
(a) Explain system bus structure
for multiprocessors.
(b)
Define a process and explain the importance of inter processor
communication. [8+8]
3. How would CPU handles multiple devices. Explain with different
techniques. [16]
4.
(a) Discuss Instruction Set
Completeness.
(b)
What is the difference between a direct and indirect address
instruction? How many references to
memory are needed for each type of
instruction to bring an operand into a processor register?
[8+8]
5. Discuss the following with examples.
(a) Zero-address instructions
(b)
One-address instructions
(c)
Two-address instructions
(d)
Three-address instructions
[16]
6. (a) Explain the organization of a 2M x 32 memory module using 512K x 8
static memory chips.
(b)
Explain how the Bit Cells are organized in a Memory Chip. [8+8]
7.
(a) Define the following terms
and their usage.
PC,MAR,MDR,ALU,IR,R0,R1......
(b)
“Having a large
number of processor registers
makes it possible to
reduce the number of memory
accesses needed to perform complex tasks”.
Devise a simple computational task to show the validity of this
statement for a processor that has four
registers compared to another that has only two registers.[8+8]
8. (a) Formulate
six-segment pipeline for a computer.
Specify the operations to be
performed in each segment.
(b)
Give an example
of a program that
will cause data conflict
in the three- segment pipeline.
[8+8]
III
B.Tech I Semester Supplementary Examinations,June 2010
COMPUTER SYSTEM ORGANIZATION Electrical
And Electronics Engineering
Time: 3 hours
Max Marks: 80
Answer any FIVE Questions
All
Questions carry equal marks
? ? ? ? ?
1.
(a) Define instruction,
instruction code and operation code.
(b)
Discuss Instruction Set Completeness.
[8+8]
2. (a) What
is cache coherence?What are the conditions for incoherence? (b) Describe the following associated with
multiprocessors
i. hardware lock
ii. test-and-set instruction
[8+8]
3. (a) Explain
the execution of subroutine
call and return operations
with micro operations.
(b)
Explain the interrupt handling process.
[8+8]
4. How many characters per second can be transmitted over a
1200-baud line in each of the following modes with a character code of 8 bits?
(a)
Synchronous serial transmission.
(b)
Asynchronous serial
transmission with two stop bits
(c)
Asynchronous serial transmission
with one stop bits [16]
5. Determine the methods of handle
branches in a pipeline instruction
execution unit. [16]
6. (a) Explain
the operations of control
unit with suitable timing
signals by taking an example.
(b)
Write the fetch routine in the case of microprogrammed control unit. [8+8]
7. (a) What
is the radix of the numbers if
the solution to the quadratic equation
x2 - 10x + 31 = 0 and x=5 and x=8?
(b)
A 36 bit floating point binary
number has eight bits
plus sign for the ex- ponent and 26 bits
plus sign for the mantissa. The
mantissa is normalized
fraction. Numbers in the mantissa and exponent are in signed magnitude rep- resentation. What are the largest and smallest positive
quantities that can be represented, excluding zero? [8+8]
8. Give a block diagram for a 4Mx8 memory using 256Kx1 memory
chips. [16]
III
B.Tech I Semester Supplementary Examinations,June 2010
COMPUTER SYSTEM ORGANIZATION Electrical
And Electronics Engineering
Time: 3 hours
Max Marks: 80
Answer any FIVE Questions
All
Questions carry equal marks
1. (a) What
is meant by writable control memory and explain microprogram control
organisation?
(b)
Give the typical horizontal and
vertical microinstruction formats.
[8+8]
2. (a) What
are computer registers. And give their functionality. (b) Sketch the register transfers for the fetch phase.
(c)
What are the phases of an
instruction cycle?
[16]
3. (a) Draw the block diagram of a computer and explain the function of each block.
(b) Write short note on types of computers.
[8+8]
4. (a) What
is cache memory? What is the necessity of employing it. How do you measure its performance?
(b)
Explain virtual memory concept
with neat diagrams. [8+8]
5. Write
about Shared memory
multiprocessors.
[16]
6. Write
assembly language program to
evaluate the following arithmetic
statement
X=(A+B)*(C+D) using
(a)
Zero-address instructions(Using stack organized computer) (b) One-address
instructions
(c)
Two-address instructions
(d)
Three-address instructions
(e)
RISC Instructions
[16]
7. Design a parallel priority interrupt with eight interrupt devices. [16]
8. (a) Is it
reasonable to classify a
Branch Target Buffer (BTB)
as just one more cache in a
machine? Why?
(b)
A 32-bit machine has a 512
entry branch target
buffer. Draw a diagram of this BTB. Assuming direct mapping, how
many bits of storage does this BTB require? [8+8]
No comments:
Post a Comment